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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Furber, S.B. |
| Copyright Year | 1996 |
| Description | Author affiliation: Dept. of Comput. Sci., Manchester Univ., UK (Furber, S.B.) |
| Abstract | There is now compelling evidence that asynchronous design is, indeed, feasible on CMOS VLSI, since several complex asynchronous chips have been built and shown to work. The work at Philips amply demonstrates power savings (at least within a particular application domain) and their elegant Tangpam synthesis tools support the concurrency claim. However, much more needs to be done to validate all these claims. Perhaps more convincing is the increasing industrial interest. Among the established players, Philips and Sun have invested considerable internal resource in asynchronous technology, and recently Intel has shown active interest. Whenever a significant technology change is foreseen, start-up companies form to exploit the inertia of the multinationals, and asynchronous logic can now claim at least two such new companies. |
| File Size | 133560 |
| File Format | |
| ISBN | 0780335414 |
| ISSN | 10893539 |
| DOI | 10.1109/TEST.1996.557167 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1996-10-20 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Clocks Logic testing Circuit testing Production Logic design Concurrent computing Frequency synchronization Asynchronous circuits Hardware Computer science |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Electrical and Electronic Engineering |
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