NDLI: Software-hardware co-design for video coding acceleration

Content Provider	IEEE Xplore Digital Library
Author	Xinwei Niu Galarza, L. Ying Gao Fan, J.
Copyright Year	2012
Description	Author affiliation: Department of Electrical Engineering, University of Wisconsin, Platteville, WI, U.S.A (Ying Gao) \|\| Department of Electrical and Computer Engineering, Florida International University, FL, U.S.A (Xinwei Niu; Galarza, L.; Fan, J.)
Abstract	In this paper, an advanced video coding acceleration based on software-hardware co-design for low power embedded system is proposed. Today, people enjoy HD video formats all over the world, but to compress it into a portable format (such as H.264) costs too much time. In embedded systems, it is very costly to transform the entire software application into a hardware solution especially if it will consume a large amount of power. Thus, we studied the famous H.264 model in order to explore the hotspot function and balance the tradeoff between speed and energy consumption. The idea is to only transform the more readily used functions into hardware by designing a coprocessor and implementing it on Virtex 5 Field-Programmable Gate Array (FPGA) platform. The experimental results from this hardware implementation showed a 5 times increase in coding speed while minimizing the energy consumption to around 81 percent.
Starting Page	57
Ending Page	60
File Size	336178
Page Count	4
File Format	PDF
ISBN	9781457714924
ISSN	00942898
e-ISBN	9781457714931
DOI	10.1109/SSST.2012.6195122
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-03-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Energy consumption Software Video coding Acceleration Encoding IP networks Embedded System H.264 Co-processor Hardware Acceleration
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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