NDLI: FPGA Prototyping and Accelerated Verification of ASIPs

Content Provider	IEEE Xplore Digital Library
Author	Podivinsky, J. Imkova, M. Cekan, O. Kotasek, Z.
Copyright Year	2015
Description	Author affiliation: Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic (Podivinsky, J.; Imkova, M.; Cekan, O.; Kotasek, Z.)
Abstract	In current SoC verification, the trend is to create verification solutions that are tailored to specific issues in SoC or to specific architectures. The reason is that the complexity of these systems makes it difficult to use general verification approaches such as formal or simulation-based verification. This paper presents a solution that is targeted to one particular area - Application-Specific Instruction-Set Processors (ASIP) and multi-processor systems containing several ASIPs. We propose automated FPGA prototyping and accelerated verification of these systems while the accelerated verification environment corresponds to the principles of UVM (Universal Verification Methodology) therefore can easily be integrated. Automated generation of verification environments and acceleration of verification runnning on a real hardware platform makes this solution very unique and beneficial, not only in speed, but also in debugging specific hardware issues.
Starting Page	145
Ending Page	148
File Size	202134
Page Count	4
File Format	PDF
ISBN	9781479967797
e-ISBN	9781479967803
DOI	10.1109/DDECS.2015.33
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-04-22
Publisher Place	Serbia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Acceleration Hardware Field programmable gate arrays Program processors Generators System-on-chip ASIP UVM FPGA Prototyping
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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