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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Shuiqiang Pei Jin Xiao Xiaoguang Hu Dan Sun |
| Copyright Year | 2015 |
| Description | Author affiliation: State Key Lab. of Virtual Reality Technol. & Syst., Beihang Univ., Beijing, China (Shuiqiang Pei; Jin Xiao; Xiaoguang Hu) || Sch. of Autom. Sci. & Electr. Eng., Beihang Univ., Beijing, China (Dan Sun) |
| Abstract | The 1553B bus system is widely used in the aerospace systems with its characters of high efficiency and real time. This paper takes BU-61580 as an example and introduces in detail the information transmitting from the host computer to the 1553B bus. In the bus information transmission, the host processor configures the bus instruction first. Then the DSP unpacks the information and transmits it to the FPGA. Finally by the configuration of the BU-61580, the 1553B bus could work on the BC, RT and BM modes. In the process of bus information upload, the FPGA takes out the information from the ram region of the BU-61580 and stores it in the buffer zone. Then the DSP takes out the information from the buffer zone through the XINTF bus and delivers it to the host processor. At last, the host processor could show the bus data in the display. The system finally completes the function of 1553B bus test system well. |
| Starting Page | 961 |
| Ending Page | 965 |
| File Size | 431506 |
| Page Count | 5 |
| File Format | |
| e-ISBN | 9781479983896 |
| DOI | 10.1109/ICIEA.2015.7334382 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-06-15 |
| Publisher Place | New Zealand |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Digital signal processing Field programmable gate arrays Random access memory Monitoring Protocols Registers Military standards information transmission 1553B bus FPGA DSP BU-61580 |
| Content Type | Text |
| Resource Type | Article |
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