NDLI: Optimization of integrated dickson voltage-multipliers for RF energy harvesting

Content Provider	IEEE Xplore Digital Library
Author	Michelon, D. Bergeret, E. Di Giacomo, A. Pannier, P.
Copyright Year	2014
Description	Author affiliation: STMicroelectron., Rousset, France (Di Giacomo, A.) \|\| IM2NP, Marseille, France (Michelon, D.; Bergeret, E.; Pannier, P.)
Abstract	This paper presents the performance optimization of a UHF Dickson voltage-multiplier used for Radio-Frequency Energy Harvesting in 130 nm CMOS technology. The main axis of intervention is the strong reduction of parasitic capacitance with layout modifications. An improvement of existing pads is proposed in order to reduce the capacitive coupling. A novel Schottky diode is proposed as well. The latter is characterized by low area occupation and low parasitic capacitance without compromising forward current capabilities. A complete electrical characterization of the new device is included. Time and cost constraints prevented major manufacturing modifications (ex. technology node, circuit topology) yet a remarkable gain in performance is demonstrated. On-wafer measures of a 3-cells Dickson voltage-multiplier RF/DC efficiency will highlight the improvements.
Starting Page	448
Ending Page	451
File Size	567560
Page Count	4
File Format	PDF
ISBN	9781479948857
DOI	10.1109/NEWCAS.2014.6934079
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-22
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radio frequency Schottky diodes Parasitic capacitance Standards CMOS integrated circuits Metals parasitic capacitance CMOS analog integrated circuits multi-stage rec-tifier RF energy harvesting radio frequency low-power CMOS layout
Content Type	Text
Resource Type	Article

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