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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Onizawa, N. Matsunaga, S. Hanyu, T. |
| Copyright Year | 2014 |
| Description | Author affiliation: Center for Spintronics Integrated Syst., Tohoku Univ., Sendai, Japan (Matsunaga, S.) || Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan (Hanyu, T.) || Frontier Res. Inst. for Interdiscipl. Sci., Tohoku Univ., Sendai, Japan (Onizawa, N.) |
| Abstract | This paper introduces a soft-error tolerant ternary content-addressable memory (TCAM) cell based on a transistor/magnetic-tunnel-junction (MTJ) hybrid structure. The MTJ device stores one-bit information as a resistance value and is often used for non-volatile memories. In the proposed nine-transistor (9T)/six-MTJ (6MTJ) cell, one-bit information is redundantly represented using three MTJs to mask a one-bit error per cell that might be occurred due to particle strikes. Thanks to the stackability of the MTJ device over a CMOS layer, there is no area overhead due to the redundancy compared to a conventional 9T-2MTJ cell. A 256-word 64-bit TCAM based on the proposed cell is designed under a 90 nm CMOS/MTJ process and is evaluated using HSPICE simulation. The simulation results show that the proposed TCAM properly operates under a one-bit error per cell with comparable energy, area and a 14% delay overhead compared to the conventional TCAM. Compared to a CMOS-based TCAM with an error-correction code that masks a one-bit error per word, the proposed TCAM reduces the number of transistors by 81% while masking a one-bit error per cell. |
| Starting Page | 193 |
| Ending Page | 196 |
| File Size | 561918 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479948857 |
| DOI | 10.1109/NEWCAS.2014.6934016 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-06-22 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Magnetic tunneling CMOS integrated circuits Computer architecture Microprocessors Transistors Resistance Error correction codes |
| Content Type | Text |
| Resource Type | Article |
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