NDLI: Design of GaN HEMT based Doherty amplifiers

Content Provider	IEEE Xplore Digital Library
Author	Markos, A.Z. Bathich, K. Boeck, G.
Copyright Year	2010
Description	Author affiliation: Berlin Institute of Technology, Microwave Engineering, Einsteinufer 25, 10587, Germany (Markos, A.Z.; Bathich, K.; Boeck, G.)
Abstract	In this paper the design of high efficiency unsymmetrical Doherty power amplifiers (PAs) will be presented. The Doherty PAs were designed to achieve high average efficiency for digitally modulated signals with high peak to average power ratio (PAR) used in third (3G) and fourth (4G) generation systems. The Doherty amplifiers have been designed using two unequal sized GaN devices for the main Class-AB and peaking Class-C amplifiers. In the first narrow band design, a 50 W Doherty amplifier has been implemented at 2.5 GHz. A drain efficiency of 54 % (48 % power added efficiency (PAE)) has been measured at its maximum output power of 47 dBm. The efficiency remains constant up to the 6 dB output power back-off. Moreover, the Doherty PA has been linearized to achieve an Adjacent Channel Leakage Ratio (ACLR) of −46 dBc at 10 MHz offset for a 10 MHz (UMTS-LTE) signal with a PAR of 8.5 dB, and an average output power of 40 dBm. 44 % PAE was measured for this signal constellation. In a second design, the status of a wideband unsymmetrical Doherty PA with 31 % fractional bandwidth will be reported.
Starting Page	1
Ending Page	5
File Size	7889607
Page Count	5
File Format	PDF
ISBN	9781424466887
e-ISBN	9781424466894
DOI	10.1109/WAMICON.2010.5461860
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-04-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Gallium nitride HEMTs Power generation Peak to average power ratio Power measurement Power amplifiers High power amplifiers Signal design Digital modulation Signal generators
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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