NDLI: A 250MHz 11Bit 20mW CMOS Low-Hold-Pedestal Fully Differential Track-and-Hold Circuit

Content Provider	IEEE Xplore Digital Library
Author	Tsung-Sum Lee Chi-Chang Lu Jian-Ting Zhan
Copyright Year	2006
Description	Author affiliation: Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Touliu (Tsung-Sum Lee)
Abstract	A new technique for realizing a very-high-speed low-power low-voltage fully differential CMOS track-and-hold circuit with low hold pedestal is presented. To achieve high sampling linearity the circuit utilizes bootstrapped input switch. The fully differential design relaxes the trade-off between sampling speed and the sampling precision. The circuit design of major building blocks is described in detailed. A prototype circuit in a 0.35-mum CMOS process is integrated and experimental results are presented. The track-and-hold circuit operates up to 250MHz of sampling frequency with less than -69dB of total harmonic distortion corresponding to 11bits for an input 85MHz sinusoidal amplitude of 1.8 $V_{pp}$ at a 3V supply. This total harmonic distortion measurement reflects the held values as well as the tracking components of the output waveform. In these conditions, a differential hold pedestal of less than 1mV, 0.8ns acquisition time at 1.8V step input, and 1.8 $V_{pp}$ full-scale differential input range are achieved. The circuit dissipates 20mW with a 3V power supply
Starting Page	1
Ending Page	4
File Size	4380165
Page Count	4
File Format	PDF
ISBN	1424401798
DOI	10.1109/VDAT.2006.258137
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-04-26
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sampling methods Switches Total harmonic distortion Linearity Switching circuits Circuit synthesis Prototypes CMOS process Frequency Distortion measurement
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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