NDLI: Radiation mitigation efficiency of scrubbing on the FPGA based CBM-TOF read-out controller

Content Provider	IEEE Xplore Digital Library
Author	Manz, S. Gebelein, J. Oancea, A. Engel, H. Kebschull, U.
Copyright Year	2013
Description	Author affiliation: Infrastrukt. und Rechnersysteme in der Informationsverarbeitung (IRI), Goethe-Univ. Frankfurt, Frankfurt am Main, Germany (Manz, S.; Gebelein, J.; Oancea, A.; Engel, H.; Kebschull, U.)
Abstract	Ionizing radiation can severely disturb the function of electronic devices, especially SRAM-based electronics such as Field Programmable Gate Arrays (FPGAs). All components which are being mounted in a radiation environment need to be qualified for use at the respective radiation level. The theory of radiation-induced equipment failures is well known and radiation mitigation techniques have been developed. However, when using commercial off-the-shelf electronics, the internal details of electronic circuits are generally not known. Therefore, the effects of radiation and the efficiency of the mitigation techniques need to be experimentally tested before the usage of the respective electronics can be approved. Here we report the result of such a test, which was carried out at the accelerator facility at Forschungszentrum Jülich, Germany, in August 2012. Contrary to previous tests, our intention was not to characterize the chip's internal logic cells using a test design which optimized for this purpose. We have evaluated the efficiency of the radiation mitigation technique scrubbing on the logic of an actual operational firmware which is currently being used by the Compressed Baryonic Matter collaboration for readout of high-energy physics detector prototypes. We did not use the particle flux as reference for characterizing the efficiency, instead, we directly counted the induced upset rate in the configuration memory of a second identical device in the beam. The firmware itself was running on a Xilinx Virtex-4 FPGA operating directly in a 2 GeV proton beam at a particle rate in the order of some $10^{7}s^{-1}cm^{-2}.$ Scrubbing has increased the lifespan of the design by almost a factor of 50 and reduced the amount of corrupted data by a factor of 200. Considering this result we can approve the usage of an FPGA-based read-out controller for the CBM-ToF subdetector.
Sponsorship	Circuits Syst. Soc.
Starting Page	1
Ending Page	6
File Size	568786
Page Count	6
File Format	PDF
ISBN	9781479900046
DOI	10.1109/FPL.2013.6645532
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-02
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Detectors Particle beams Single event upsets Atmospheric measurements Particle measurements
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Single Event Upsets in Xilinx Virtex-4 FPGA Devices

Heavy Ion Single Event Effects Measurements of Xilinx Zynq-7000 FPGA

Neutron single event upsets in SRAM-based FPGAs

Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAs

A three-dimensional FPGA array beam detector for ionizing radiation experiments

Analysis and Detection of Multiple Cell Upsets in SRAM Memories Used as Particle Detectors

Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs

Study on FPGA SEU mitigation for readout electronics of DAMPE BGO calorimeter

A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor

Radiation mitigation efficiency of scrubbing on the FPGA based CBM-TOF read-out controller

Similar Documents

Single Event Upsets in Xilinx Virtex-4 FPGA Devices

Heavy Ion Single Event Effects Measurements of Xilinx Zynq-7000 FPGA

Neutron single event upsets in SRAM-based FPGAs

Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAs

A three-dimensional FPGA array beam detector for ionizing radiation experiments

Analysis and Detection of Multiple Cell Upsets in SRAM Memories Used as Particle Detectors

Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs

Study on FPGA SEU mitigation for readout electronics of DAMPE BGO calorimeter

A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor

Radiation mitigation efficiency of scrubbing on the FPGA based CBM-TOF read-out controller