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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Irick, K. DeBole, M. Narayanan, V. Sharma, R. Hankyu Moon Mummareddy, S. |
| Copyright Year | 2007 |
| Description | Author affiliation: Pennsylvania State Univ., University Park (Irick, K.; DeBole, M.; Narayanan, V.) |
| Abstract | An integral part of interactive computing environments are systems that have the ability to process information about their users in real-time. In many cases it is desirable to not only recognize a human user but also to extract as much information about the user as possible, such as gender, ethnicity, age, etc. In this paper we present an FPGA implementation of a neural network configured specifically for performing face detection and gender classification in real-time video streams. Our streaming architecture performs the face and gender classification tasks at 30 frames per second on a small sized Virtex-4 FPGA, at accuracy comparable to that of a leading commercial software implementation. |
| Starting Page | 267 |
| Ending Page | 272 |
| File Size | 3798945 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424410590 |
| DOI | 10.1109/FPL.2007.4380658 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-08-27 |
| Publisher Place | Netherlands |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Face detection Computer architecture Field programmable gate arrays Streaming media Artificial neural networks Real time systems Neural networks Hardware Logic Computer science |
| Content Type | Text |
| Resource Type | Article |
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