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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Myat Thu Linn Aung Lim, E. Yoshikawa, T. Kim, T.T.-H. |
| Copyright Year | 2015 |
| Description | Author affiliation: Mixed-Signal Technol. Dev. Div., Panasonic Corp., Kadoma, Japan (Yoshikawa, T.) || Sch. of EEL, Nanyang Technol. Univ., Singapore, Singapore (Myat Thu Linn Aung; Kim, T.T.-H.) || Panasonic Semicond., Singapore, Singapore (Lim, E.) |
| Abstract | A capacitive coupling interconnect (CCI) is formed with top metals from two separate dies when they are stacked in face-to-face configuration. The CCI provides inherent advantages of 3D integrations such as high level of communication parallelism and heterogeneity in much larger scale compared to μ-bump technologies because the CCI electrodes can be as small as 8 × 8 $μm^{2}$ compared to approximately 25 × 25 $μm^{2}$ pad dimension of μ-bump. In this paper, various challenges of the CCI from interconnect modeling to circuit design are discussed. The implementation issues such as electrodes alignment and crosstalk among proximity CCIs are also presented with different solutions from several reported designs. Some possible applications of the CCI are discussed and its future trend is examined based on the data reported in literature. |
| Starting Page | 245 |
| Ending Page | 248 |
| File Size | 140427 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479983629 |
| e-ISBN | 9781479983643 |
| DOI | 10.1109/EDSSC.2015.7285096 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-06-01 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Conferences Electron devices Solid state circuits |
| Content Type | Text |
| Resource Type | Article |
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