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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Rivin, I. Chakradhar, S.T. |
| Copyright Year | 1994 |
| Description | Author affiliation: Sch. of Math., Inst. for Adv. Study, Princeton, NJ, USA (Rivin, I.) |
| Abstract | We describe a continuous optimization approach for the test generation of combinational circuits. We extend the domain of signal values from the traditional Boolean 0 or 1 value to the real unit interval /spl lsqb/0, 1/spl rsqb/. Responses of Boolean gates comprising the circuit are also extended to deal with real input values. Non-linear smooth functions are constructed for every gate. A non-linear continuous function for the entire circuit is obtained as a summation of the individual gate functions. A similar function is derived for the faulty circuit. We construct an objective function using the good and faulty circuit functions. The objective function is minimized when at least one of the corresponding outputs of the good and faulty circuit differ. The test generation problem is formulated as the minimization of the objective function over a unit hypercube in the Euclidean space. The dimension of the space is equal to the number of primary inputs of the circuit. We optimize the smooth function inside a convex polytope using a variant of gradient descent and line search strategies. We start at the center of the hypercube and follow a trajectory to one of the corners of the hypercube that corresponds to a test vector. Preliminary experimental results on the ISCAS '85 and '89 benchmark circuits demonstrate the feasibility of our approach. |
| Starting Page | 100 |
| Ending Page | 105 |
| File Size | 587180 |
| Page Count | 6 |
| File Format | |
| ISBN | 0818654406 |
| DOI | 10.1109/VTEST.1994.292327 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1994-04-25 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit testing Hypercubes Circuit faults Benchmark testing Space exploration Signal generators Neural networks Mathematics National electric code Combinational circuits |
| Content Type | Text |
| Resource Type | Article |
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