NDLI: An industrial environment for high-level fault-tolerant structures insertion and validation

Content Provider	IEEE Xplore Digital Library
Author	Berrojo, L. Corno, F. Entrena, L. Gonzalez, I. Lopez, C. Sonza Reorda, M. Squillero, G.
Copyright Year	2002
Description	Author affiliation: Alcatel Espacio S.A., Madrid, Spain (Berrojo, L.)
Abstract	When designing a VLSI circuits, most of the efforts are now performed at levels of abstractions higher than gate. Correspondingly to this clear trend, there is a growing request to tackle safety-critical issues directly at the RT-level. This paper presents a complete environment for considering safety issues at the RT level. The environment was implemented and tested by an industry for devising a sample safety-critical device. Designers were permitted to assess the effects of transient faults, automatically add fault-tolerant structures, and validate the results working on the same circuit descriptions and acting in a coherent framework. The evaluation showed the effectiveness of the proposed environment.
Sponsorship	IEEE Comput. Soc. Test Technol. Tech. Council
Starting Page	229
Ending Page	236
File Size	354801
Page Count	8
File Format	PDF
ISBN	0769515703
DOI	10.1109/VTS.2002.1011143
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-04-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Circuit faults Very large scale integration Aerospace electronics Process design Safety Circuit testing Automotive engineering Design engineering Hardware design languages
Content Type	Text
Resource Type	Article

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