NDLI: Low Programming Current Phase Change Memory Cell with Double GST Thermally Confined Structure

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Low Programming Current Phase Change Memory Cell with Double GST Thermally Confined Structure

Content Provider	IEEE Xplore Digital Library
Author	Der-Sheng Chao Hong-Hui Hsu Ming-Jung Chen Yi-Chan Chen Chen, F. Chain-Ming Lee Yen, P.H. Chih-Wei Chen Wen-Han Wang Wei-Su Chen Chenhsin Lien Ming-Jer Kao Ming-Jinn Tsai
Copyright Year	2007
Description	Author affiliation: ITRI, Chutung (Der-Sheng Chao; Hong-Hui Hsu; Ming-Jung Chen; Yi-Chan Chen; Chen, F.; Chain-Ming Lee; Yen, P.H.; Chih-Wei Chen; Wen-Han Wang; Wei-Su Chen)
Abstract	A novel PCM cell with double GST thermally confined structure was proposed and fabricated in this work. by inserting an extra bottom GST layer under the confined GST region, the heat loss can be effectively prevented and the temperature profile over active region becomes more uniform. thus, a low reset current less than 0.3 ma can be achieved and the set performance is also improved to be faster than 200 ns.
Starting Page	1
Ending Page	2
File Size	1157643
Page Count	2
File Format	PDF
ISBN	142440584X
ISSN	1524766X
DOI	10.1109/VTSA.2007.378935
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-04-23
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change memory Phase change materials Electrodes Temperature CMOS technology Heating Thermal conductivity Dielectric substrates Optical films Crystallization
Content Type	Text
Resource Type	Article

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