Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jakschik, S. Hoffmann, T. Cho, H.-J. Veloso, A. Loo, R. Sorada, H. Inoue, A. Potter, M.d. Eneman, G. Severi, S. Absil, P. Biesemans, S. |
| Copyright Year | 2007 |
| Description | Author affiliation: Infineon, Heverlee (Jakschik, S.) |
| Abstract | This report presents high-k poly ring oscillators with a performance of tau=16.2 ps/st at 6E-6A/st for Lg=80 nm. This was achieved by using a SiGe channel for nFET and pFET. A minimum device length of 50 nm was built by using this technique. The transistors reach Ion=120 muA/mum at Ioff=20 pA/mum with Tinv=2.4 nm, resulting in a normalized delay of 8.7 ps (Vdd=1.0 V). This is the best high-k poly pFET performance published so far (~Ion=220 muA/mum at Vdd=-1.2 V). We demonstrate the combination of the SiGe channel with common performance enhancement techniques like stress liners and rotated channel as used in the hybrid oriented substrate technique. The buried channel improves short channel effects and has no reliability trade off. Although hole mobility is enhanced in SiGe channel transistors, further gain was observed in narrow width structures. Peak mobility can be up to 130 $cm^{2}/Vs$ for pFET, extending the universal mobility for silicon. After investigating Vt and short channel effects we are able to show, that half of the gain is caused by more efficient stress in narrow width structures. The other half is attributed to EPI loading effects in small structures. Fluorine I/I in the well improves NBTI behavior by more than one decade in time. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 1106037 |
| Page Count | 2 |
| File Format | |
| ISBN | 142440584X |
| ISSN | 1524766X |
| DOI | 10.1109/VTSA.2007.378905 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-04-23 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | High K dielectric materials High-K gate dielectrics Silicon germanium Germanium silicon alloys Niobium compounds Titanium compounds Compressive stress Delay Random access memory Ring oscillators |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|