NDLI: Tutorial T1B: Riding the "Energy Consumption Horse"

Content Provider	IEEE Xplore Digital Library
Author	Avasare, P. Chandrachoodan, N.
Copyright Year	2013
Description	Author affiliation: IMEC Belgium (Avasare, P.) \|\| Indian Institute of Technology, Madras, India (Chandrachoodan, N.)
Abstract	Summary form only given. We begin with a survey of the system-level energy estimation techniques, with a look at the potential pitfalls and trade-offs in accuracy at various levels of modeling. We further discuss various approaches to estimate energy estimation accurately at higher abstraction levels. The main focus of the tutorial is on an energy estimation flow that has been successfully used in design of state-of-the-art Gigabit per second (Gbps), multi-stream Software Defined Radio (SDR) receiver supporting WLAN, LTE and DVB applications. The design flow itself is generic, and has been found immensely useful especially during energy optimization iterations. When a particular energy optimization was implemented at the back-end synthesis, we could percolate the benefits at higher abstraction levels and verify them for all the available applications to be run on the platform. Further, we show how our flow gave us quick and accurate feedback on performance figures with respect to feasibility of mapping a new upcoming wireless standard on our existing tape-out. The tutorial concludes with a look at some of the open problems in the area of system-level power modeling, both from a practical and research point of view.
Sponsorship	IEEE Comput. Soc.
File Size	115073
File Format	PDF
ISBN	9781467346399
ISSN	10639667
DOI	10.1109/VLSID.2013.135
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-05
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Tutorials
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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