NDLI: Improved Reliability of Electron Devices Through Optimized Coverage of Surface Topography

Content Provider	IEEE Xplore Digital Library
Author	Kern, Werner Vossen, J. L. Schnable, G. L.
Copyright Year	1973
Description	Author affiliation: RCA Corporation, David Sarnoff Research Center, Princeton, New Jersey 08540 (Kern, Werner; Vossen, J. L.; Schnable, G. L.)
Abstract	Improper coverage of surface topography can lead to a variety of reliability and yield problems in electron devices. The nature of coverage defects and failure mechanisms is discussed, and techniques for improving the reliability by chemical tapering processes and/or optimized film deposition methods are reviewed and classified. Specific examples of experimental conditions are given for obtaining tapered edges of delineated films by chemical and by fusion techniques. Means for achieving improved step coverage by deposited films are also outlined. Several examples of applications to device processing are presented in the experimental part of the paper. A novel electrical process control method utilizing noise measurements in a selected frequency range is demonstrated to be an extremely sensitive tool for rapidly determining variations in the cross-sectional area of conductor films. Experimental results are given to illustrate the applicability of the new method for evaluating taper angles from 3 to 90°.
Starting Page	214
Ending Page	223
File Size	14214408
Page Count	10
File Format	PDF
ISSN	07350791
DOI	10.1109/IRPS.1973.362599
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1973-04-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electron devices Surface topography Conductors Chemical processes Integrated circuit reliability Dielectrics Failure analysis Process control Noise measurement Conductive films
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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