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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Callanan, O. Castelfranco, A. Crawford, C.H. Creedon, E. Lekuch, S. Muller, K. Nutter, M. Penner, H. Purcell, B. Purcell, M. Xenidis, J. |
| Copyright Year | 2011 |
| Description | Author affiliation: IBM Ireland Product Dist, Ltd, Muddart, Ireland (Callanan, O.; Castelfranco, A.; Creedon, E.; Muller, K.; Purcell, B.; Purcell, M.) || IBM TJ Watson Research Center in Yorktown Heights, NY (Crawford, C.H.; Lekuch, S.; Nutter, M.; Penner, H.) || IBM Austin Research Lab in Austin, TX (Xenidis, J.) |
| Abstract | Traditional use of software and hardware simulators and emulators has been in efforts for chip level analysis and verification. However, prototyping and bringup requirements often demands system or platform level integration and analysis requiring new uses of these traditional pre-silicon methods along with novel interpretations of existing hardware to prototype some functions matching behaviors of future systems. In order to demonstrate the versatility and breadth of the pre-silicon environments in our systems lab, ranging from functional instruction set software simulators to Field Programmable Gate Array (FPGA) chip logic implementations to integrated systems of existing hardware built to mimic key functional aspects of the future platforms, we present our experiences with platform level verification, analysis and early software development/enablement for an I/O attached network appliance system. More specifically, we show how simulation tools along with these early prototype systems were used to do chip level verification, early software development and even system level software testing for a System on a Chip processor attached as an I/O accelerator via Peripheral Component Interconnect Express (PCI Express) to a host system. Our experiences demonstrate that leveraging the full range of pre-silicon environment capabilities results in full system level integrated software test for a I/O attached platform prior to the availability of fully functional ASICs. |
| Starting Page | 45 |
| Ending Page | 52 |
| File Size | 186133 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781457706585 |
| e-ISBN | 9781457706608 |
| e-ISBN | 9781457706592 |
| DOI | 10.1109/RSP.2011.5929974 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-05-24 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Hardware Driver circuits Computer architecture Kernel Engines Field programmable gate arrays system analysis and design Software debugging software prototyping accelerator architectures product engineering |
| Content Type | Text |
| Resource Type | Article |
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