NDLI: A model-driven based framework for rapid parallel SoC FPGA prototyping

Content Provider	IEEE Xplore Digital Library
Author	Baklouti, M. Ammar, M. Marquet, P. Abid, M. Dekeyser, J.-C.
Copyright Year	2011
Description	Author affiliation: LIFL, Univ. Lille 1, INRIA Lille Nord Europe UMR 8022, CNRS, F-59650, Villeneuve d'ascq, France (Baklouti, M.; Marquet, P.; Dekeyser, J.-C.) \|\| CES Laboratory, Univ. Sfax, ENIS School BP 1173, Sfax 3038, Tunisia (Ammar, M.; Abid, M.)
Abstract	Model-Driven Engineering (MDE) based approaches have been proposed as a solution to cope with the inefficiency of current design methods. In this context, this paper presents an MDE-based framework for rapid SIMD (Single Instruction Multiple Data) parametric parallel SoC (System-on-Chip) prototyping to deal with the ever-growing complexity of such embedded systems design process. The design flow covers the design phases from system-level modeling to FPGA prototyping. The proposed framework allows the designer to easily and automatically generate a VHDL parallel SoC configuration from a high-level system specification model using the MARTE (Modeling and Analysis of Real-Time and Embedded systems) standard profile. It is based on an IP (Intellectual Property) library and a basic parallel SoC model. The generated parallel configuration can be adapted to the data-parallel application requirements. In an experimental setting, four steps are needed to generate a parallel SoC: data-parallel programming, SoC modeling, deployment and generation process. Experimental results for a video application validate the approach and demonstrate that the proposed framework facilitates the parallel SoC exploration.
Starting Page	149
Ending Page	155
File Size	426032
Page Count	7
File Format	PDF
ISBN	9781457706585
e-ISBN	9781457706608
e-ISBN	9781457706592
DOI	10.1109/RSP.2011.5929989
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-24
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Unified modeling language System-on-a-chip Program processors IP networks Field programmable gate arrays Libraries Integrated circuit modeling
Content Type	Text
Resource Type	Article

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