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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Frappe, A. Stefanelli, B. Flament, A. Kaiser, A. Cathelin, A. |
| Copyright Year | 2008 |
| Description | Author affiliation: IEMN - ISEN, Lille (Frappe, A.; Stefanelli, B.; Flament, A.; Kaiser, A.) |
| Abstract | The presented digital RF signal generator in 90 nm CMOS uses 1-bit DeltaSigma modulation and targets mobile communication terminals. A 50 MHz bandwidth centered on 1 GHz can be achieved when the circuit is clocked at 4 GHz. Signals up to 3 GHz can be synthesized when using the first image band. The peak output power into a 100 Omega diff. load is 3.1 dBm with 53.6 dB SNDR. The digital core employs redundant arithmetic, precomputed non-exact quantization and differential dynamic logic. The digital core consumes 49 mW at maximum clock frequency. Active area is 0.15 $mm^{2}.$ |
| Starting Page | 13 |
| Ending Page | 16 |
| File Size | 964200 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424418084 |
| ISSN | 15292517 |
| DOI | 10.1109/RFIC.2008.4561375 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-06-17 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Signal generators Mobile communication Transmitters Clocks Delta modulation Digital modulation Bandwidth Circuit synthesis Signal synthesis Power generation redundant number systems Radio transmitters sigma-delta modulation digital radio digital-analog conversion CMOS integrated circuits |
| Content Type | Text |
| Resource Type | Article |
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