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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sheng-Yi Huang Cheng-Chou Hung Liang, V. Wen-Shiang Liao Tzung-Lin Li Jeng-Hung Li Chih-Yuh Tzeng Guo-Wei Huang Kun-Ming Chen |
| Copyright Year | 2008 |
| Description | Author affiliation: United Microelectron. Corp., Hsinchu (Sheng-Yi Huang; Cheng-Chou Hung; Liang, V.; Wen-Shiang Liao; Tzung-Lin Li; Jeng-Hung Li; Chih-Yuh Tzeng) |
| Abstract | This paper proposes a cost-effective RF power cell manufactured in an advanced 0.13 um CMOS technology. Without adding additional masks, cost, and process, the power performance can be improved just by using the standard N-well and shallow-trench-isolation processes to form a higher resistive region. This ldquoPseudo-Drainrdquo structure increases the breakdown voltage to more than 4.3V and is higher than the value of 2.5V of the standard 0.13 um core-MOS transistor. This transistor exhibits a high $f_{T}timesBV_{DS}$ product of 352 for CMOS power FETs. Cutoff frequency and maximum oscillation frequency of 83 GHz and 124 GHz were achieved at a drain bias of 1.2V, respectively; while the maximum power gain, output power and power-added efficiency were 25.6 dB, 19 dBm, and 55%, respectively. Good RF linearity and noise figure were also obtained, as demonstrated by an OIP3 and $NF_{min}$ of 28.32 dBm and 0.4 dB. The presented RF power transistor is cost effective and can be used for power amplifier integration in RF-CMOS SOC. |
| Starting Page | 259 |
| Ending Page | 262 |
| File Size | 1333466 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424418084 |
| ISSN | 15292517 |
| DOI | 10.1109/RFIC.2008.4561431 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-06-17 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | CMOS technology Radio frequency Costs Cutoff frequency Pulp manufacturing FETs Power generation Linearity Noise figure Noise measurement RF SoC CMOS power transistor linearity power amplifiers |
| Content Type | Text |
| Resource Type | Article |
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