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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Cafaro, G. Gradishar, T. Heck, J. Machan, S. Nagaraj, G. Olson, S. Salvi, R. Stengel, B. Ziemer, B. |
| Copyright Year | 2007 |
| Description | Author affiliation: Motorola Labs, Plantation (Cafaro, G.; Gradishar, T.; Heck, J.; Machan, S.; Nagaraj, G.; Olson, S.; Salvi, R.; Stengel, B.; Ziemer, B.) |
| Abstract | This paper describes a fundamentally flexible low power transceiver implemented in 90 nm CMOS. Novel circuit architectures have been implemented to overcome problems that have encumbered wideband transceivers in the past. Flexible programming allows the RFIC to process signals of multiple wireless protocols from 100 MHz - 2.5 GHz with channel bandwidths from 8 KHz to 20 MHz. At 1.8 GHz the receiver noise figure is 7 dB with IP3 of -6 dBm and voltage gain of 48 dB. The transmitter has better than 40 dB carrier suppression, 35 dB sideband suppression, and EVM of 1% at 800 MHz. The frequency synthesizer uses direct digital synthesis to achieve instantaneous frequency switching and phase noise of -123 dBc/Hz at 25 KHz offset. |
| Starting Page | 189 |
| Ending Page | 192 |
| File Size | 399886 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424405300 |
| ISSN | 15292517 |
| DOI | 10.1109/RFIC.2007.380862 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-06-03 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Transceivers Frequency synthesizers Wideband Radiofrequency integrated circuits Signal processing Wireless application protocol Bandwidth Noise figure Voltage Gain Transceiver CMOS Direct Conversion DDS SDR |
| Content Type | Text |
| Resource Type | Article |
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