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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sugawara, Y. Asano, M. Singh, R. Palmour, J. Takayama, D. |
| Copyright Year | 2000 |
| Description | Author affiliation: Tech. Res. Center, Kansai Electr. Power Co. Inc., Amagasaki, Japan (Sugawara, Y.) |
| Abstract | A novel high voltage SiC MOS device named SIAFET (Static induction Injected Accumulated FET) is proposed, which has no pn junction in its on-current flow path and has a conductivity modulation by carriers injected from a p+ buried gate. SIAFET with blocking voltage (BV) of 5500 V and specific on-resistance RonS (without the conductivity modulation) of 57 m/spl Omega/cm/sup 2/ was designed by using the 6200 V mesa JTE and was fabricated using 4H-SiC substrates. Its basic operation has been confirmed for the first time and it has been demonstrated that its RonS has been shown to reduce to less than 1/6 by SIAFET action. Although its achieved BV is relatively low (2030 V and 4580 V) and its RonS is relatively high (172 m/spl Omega/cm/sup 2/ and 387 m/spl Omega/cm/sup 2/), RonS of 4580 V SiC-SIAFET is less than 1/25 that of the theoretical RonS limit of Si-MOSFET for this BV. |
| Starting Page | 105 |
| Ending Page | 108 |
| File Size | 341696 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780362691 |
| ISSN | 10636854 |
| DOI | 10.1109/ISPSD.2000.856783 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-05-22 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Voltage Silicon carbide FETs Conductivity MOS devices Substrates Fabrication Power semiconductor devices TV Joining processes |
| Content Type | Text |
| Resource Type | Article |
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