NDLI: An SOI process for fabrication of solar cells, transistors and electrostatic actuators

Content Provider	IEEE Xplore Digital Library
Author	Bellew, C.L. Hollar, S. Pister, K.S.J.
Copyright Year	2003
Description	Author affiliation: Berkeley Sensor & Actuator Center, California Univ., Berkeley, CA, USA (Bellew, C.L.; Hollar, S.; Pister, K.S.J.)
Abstract	We have developed a new process for fabricating integrated, solar-powered microelectromechanical systems (MEMS) on a silicon-on-insulator (SOI) wafer. The intended applications for this process are autonomous microsystems, such as microrobots and distributed sensor networks. Two versions of the process have been created. The first combines solar cells and MEMS devices with NMOS transistors utilizing metal gates. This version has yielded solar cell efficiencies greater that 11%, a 200 cell array with an output of 88.5 V and transistor breakdown voltages above 25 V. Using this process, a fully integrated device has been demonstrated consisting of an electrostatic, gap-closing actuator being powered by an on-board buffer consisting of an NMOS inverter. The only external connections were ground and a 5 V control signal. A second version has also been developed which provides better solar cell performance and CMOS circuits utilizing polysilicon gates. This version has yielded solar cell efficiencies greater than 14%, a 90 cell array with an output over 50 V, and NMOS and PMOS devices with breakdown voltages greater than 50 V.
Sponsorship	IEEE Electron Devices Soc
Starting Page	1075
Ending Page	1078
File Size	453450
Page Count	4
File Format	PDF
ISBN	0780377311
DOI	10.1109/SENSOR.2003.1216955
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-06-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fabrication Photovoltaic cells Electrostatic actuators MOS devices Microelectromechanical systems Micromechanical devices Silicon on insulator technology Microelectromechanical devices MOSFETs Inverters
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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