NDLI: Non-Linear Gate Length Dependence of On-Current in Si-Nanowire FETs

Content Provider	IEEE Xplore Digital Library
Author	Weber, W.M. Graham, A.P. Duesberg, G.S. Liebau, M. Cheze, C. Geelhaar, L. Unger, E. Pamler, W. Hoenlein, W. Riechert, H. Kreupl, F. Lugli, P.
Copyright Year	2006
Description	Author affiliation: Qimonda Dresden GmbH & Co. (Weber, W.M.; Graham, A.P.; Duesberg, G.S.; Liebau, M.; Cheze, C.; Geelhaar, L.)
Abstract	An extensive gate-length $(L_{G})$ dependent electrical characterization of silicon nanowire (NW) field effect transistors (FET) is presented here. Catalytically-grown and nominally undoped Si-NWs were integrated as the active region of FETs, upon which fully silicided Schottky source and drain contacts were fabricated. The length of the active region was shortened by a desired value, through the lateral self-aligned formation of nickel silicide source- and drain-segments. All Si-NW FETs consisting of a single Si-NW with diameters between 10 and 30 nm display p-type behaviour and on/off-current ratios of up to 10 $^{7}.$ Devices with $L_{G}s$ below 1 mum and 21 nm NW-diameters all show the same on currents around 1 muA at 1 V drain-source biases. For $L_{G}$ > 1 mum the on-current decreases exponentially with increasing $L_{G}$
Starting Page	423
Ending Page	426
File Size	700565
Page Count	4
File Format	PDF
ISBN	1424403014
ISSN	19308876
DOI	10.1109/ESSDER.2006.307728
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-19
Publisher Place	Switzerland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	FETs Nickel Annealing Silicon Silicides Lithography Nanoelectronics Fabrication Semiconductivity Temperature
Content Type	Text
Resource Type	Article

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