NDLI: Investigations on an Isolated Lateral High-Voltage n-channel LDMOS Transistor with a Typical Breakdown of 150V

Content Provider	IEEE Xplore Digital Library
Author	Knaipp, M. Jong Mun Park Vescoli, V. Roehrer, G. Minixhofer, R.
Copyright Year	2006
Description	Author affiliation: Dept. Process Dev., Austriamicrosystems AG, Unterpremstaetten (Knaipp, M.; Jong Mun Park; Vescoli, V.; Roehrer, G.; Minixhofer, R.)
Abstract	This work describes a concept of an isolated high-voltage (HV) n-channel LDMOS transistor, which can be used as a high-side switch instead of a HV PMOS transistor. HV n-channel LDMOSFETs for 120V applications (blocking voltage over 150V) were used in the study. The devices were fabricated in a 0.35 mum CMOS-based HV technology. Hot carrier stress experiments (under gate voltage VGS = 10V and drain voltage VD = 120V) were performed for device reliability evaluations. The devices with non-uniformly optimized n-well show an excellent trade-off between blocking voltage (BV) and on-resistance while keeping hot carrier induced degradation low
Starting Page	266
Ending Page	269
File Size	489590
Page Count	4
File Format	PDF
ISBN	1424403014
ISSN	19308876
DOI	10.1109/ESSDER.2006.307689
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-19
Publisher Place	Switzerland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electric breakdown Voltage Switches Hot carriers MOSFETs CMOS technology Isolation technology Stress Performance evaluation Degradation
Content Type	Text
Resource Type	Article

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