NDLI: 85 dB dynamic range 1.2 mW 156 kS/s biopotential recording IC for high-density ECoG flexible active electrode array

Content Provider	IEEE Xplore Digital Library
Author	Sohmyung Ha Jongkil Park Chi, Y.M. Viventi, J. Rogers, J. Cauwenberghs, G.
Copyright Year	2013
Description	Author affiliation: Cognionics, Inc., San Diego, CA, USA (Chi, Y.M.) \|\| Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA (Viventi, J.) \|\| Dept. of Mater. Sci. & Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA (Rogers, J.) \|\| Depts. of Bioeng. & Electr. & Comput. Eng., UC San Diego, La Jolla, CA, USA (Sohmyung Ha; Jongkil Park; Cauwenberghs, G.)
Abstract	We present the design, implementation, and experimental characterization of a low-noise low-power biopotential recording integrated circuit (IC) in support of a fully implantable, high-density, actively multiplexed and flexible 32×32 electrode array for electrocorticography (ECoG) neural recording. Each ECoG recording IC contains an 8-channel ADC, each serving one column and multiplexing up to 32 rows in the external ECoG array. Each column ADC converts signal coarsely by 10-bit successive approximation (SA), and performs fine conversion of the residue by 7-bit 1st order incremental delta-sigma (ΔΣ) conversion. One bit of overlap between SA and ΔΣ stages supports wide dynamic range with an instantaneous core range of 3.9 mV, sufficiently larger than typical ECoG signals, while handling electrochemical and process variations in the ECoG electrode array up to ±1 V. Tests show a measured dynamic range of 85 dB and CMRR of 87 dB at 19.5 kS/s and at 19.4 μA from 3.3 V per ADC channel. The 8-channel IC occupies 18 $mm^{2}$ in 0.6 μm 2P3M CMOS.
Starting Page	141
Ending Page	144
File Size	1517121
Page Count	4
File Format	PDF
ISBN	9781479906437
ISSN	19308833
e-ISBN	9781479906451
DOI	10.1109/ESSCIRC.2013.6649092
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-16
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrodes Arrays Integrated circuits Capacitors Electroencephalography Multiplexing Switches
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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