NDLI: A 1mW 40-190MHz BJT logarithmic biquad

Content Provider	IEEE Xplore Digital Library
Author	Drakakis, E.M.
Copyright Year	2003
Description	Author affiliation: Dept. of Bioeng., Fac. of Eng., London, UK (Drakakis, E.M.)
Abstract	This paper reports measured results from a class-A silicon bipolar lowpass logarithmic biquad. The fabricated chip aims: (i) at low power consumption; and (ii) at the investigation of the functionality - i.e. tuneability and linearity for strong input signals - of the log-domain technique when biasing currents internal to the topology operating points differ considerably. The measured results shown here verify that the technique preserves the desirable features of tuneability and good linearity under such conditions. The circuit was laid out in the P71 LM Ericsson process. With the power consumption ranging from 0.8 to 3 mW a bandwidth of 40 to 190 MHz was achieved. The second order distortion was -37 dB for an input modulation index of 65%. The intermodulation product levels were 30dB below the fundamentals for an output modulation index in excess of 80%.
Sponsorship	IEEE SSCS Infieon Technol. ATMEL Tower Semiconductor LTD
Starting Page	485
Ending Page	488
File Size	426095
Page Count	4
File Format	PDF
ISBN	0780379950
DOI	10.1109/ESSCIRC.2003.1257178
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-09-16
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Linearity Circuit testing Semiconductor device measurement Energy consumption Circuit topology Modulation Circuit synthesis Current measurement Mirrors Power supplies
Content Type	Text
Resource Type	Article

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