NDLI: A cable-modem RF tuner

Content Provider	IEEE Xplore Digital Library
Author	Stadius, K. Malinen, A. Jarvio, P. Halonen, K. Paatsila, P.
Copyright Year	2003
Description	Author affiliation: Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland (Stadius, K.; Malinen, A.; Jarvio, P.; Halonen, K.)
Abstract	In monolithic integration of cable-modem RF tuners a double-conversion receiver architecture is used. In this paper we present a prototype design of an upconverter and a downconverter unit. The upconverter upconverts a channel from 47-862 MHz input band to around 1575 MHz intermediate frequency. The image-reject downconverter shifts the channel to 36.125 MHz (EU) or to 43.75 MHz (US). The upconverter includes a variable-gain low-noise amplifier, a double balanced mixer, a three-stage VCO bank for LO generation and a divide-by-two circuit for driving an external PLL. The downconverter includes a LNA, image-reject mixers in Hartley configuration, a 3-stage polyphase filter, an IF-amplifier and a SAW driver. For LO generation the circuit includes a 6-GHz on -chip VCO, a divide-by-four circuit quadrature LO and a divide-by-16 for feeding an external PLL. Signal reversal switching in the LO buffer can be used for the selection of LSB/USB injection. All building blocks are presented in this paper and experimental results are given from the upconverter, downconverter, and RF tuner demonstrator including SAW filters with center frequencies at 1575 MHz and 44 MHz. the circuits are fabricated in a 0.9-/spl mu/m SiGe bipolar process.
Sponsorship	IEEE SSCS Infieon Technol. ATMEL Tower Semiconductor LTD
Starting Page	421
Ending Page	424
File Size	592001
Page Count	4
File Format	PDF
ISBN	0780379950
DOI	10.1109/ESSCIRC.2003.1257162
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-09-16
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radio frequency Tuners Voltage-controlled oscillators Phase locked loops Monolithic integrated circuits Prototypes Low-noise amplifiers Channel bank filters Surface acoustic waves Driver circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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