NDLI: Double gate dynamic threshold voltage (DGDT) SOI MOSFETs for low power high performance designs

Content Provider	IEEE Xplore Digital Library
Author	Liqiong Wei Zhanping Chen Roy, K.
Copyright Year	1997
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA (Liqiong Wei)
Abstract	In this paper, double gate dynamic threshold voltage (DGDT) SOI MOSFETs, which combine the advantages of DTMOS and FD SOI MOSFETs without the limitation of the supply voltage, are simulated using SOI-SPICE4.4. The threshold voltages, leakage currents and drive currents for FD SOI MOSFETs and DGDT SOI MOSFETs are compared. DGDT SOI MOSFETs show symmetric characteristics and the best I/sub on/I(off)/. Excellent DC inverter characteristics down to 0.15 V and good full adder performance at 1V are shown. The propagation delay and the average power consumption of the full adder are 0.625 ns and 11.5 /spl mu/W, respectively. It can be seen that DGDT SOI MOSFET is a good candidate for low power high performance designs.
Starting Page	82
Ending Page	83
File Size	190306
Page Count	2
File Format	PDF
ISBN	078033938X
ISSN	1078621X
DOI	10.1109/SOI.1997.634943
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-10-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Threshold voltage MOSFETs Leakage current Circuits Low voltage Voltage control Silicon Capacitance Energy consumption Very large scale integration
Content Type	Text
Resource Type	Article

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Double gate dynamic threshold voltage (DGDT) SOI MOSFETs for low power high performance designs