NDLI: A differential read subthreshold SRAM bitcell with self-adaptive leakage cut off scheme

Content Provider	IEEE Xplore Digital Library
Author	Bai Na Xuan Chen Yang Jun Shi Longxin
Copyright Year	2010
Description	Author affiliation: National ASIC System Engineering Research Center, Southeast University, China (Bai Na; Yang Jun; Shi Longxin) \|\| Department of Electrical Engineering and Automation, Nanjing University of Posts and Telecommunications. China (Xuan Chen)
Abstract	Leakage energy increases dramatically in subthreshold region because delay increases exponentially with decreasing supply voltage. Compared to generic logic, subthreshold SRAM blocks consume more leakage energy. However, all most previous subthreshold analyzes ignore the leakage current in both active operation and standby operation. To address this challenge, a differential read subthreshold SRAM is presented in this paper. Buffering circuit and reconfigurable operating principle ensure both read and standby stability without the expense of writability. Combined with dynamic cut off scheme, the leakage current of the proposed design is reduced remarkably in both active and standby operation without increasing dynamic energy dissipation or performance penalty.
Starting Page	455
Ending Page	460
File Size	3263117
Page Count	6
File Format	PDF
ISBN	9781424466825
e-ISBN	9781424466832
DOI	10.1109/SOCC.2010.5784678
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Transistors Leakage current Stability analysis Energy dissipation Transient analysis Current distribution
Content Type	Text
Resource Type	Article

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