NDLI: A mixed-signal timing circuit in 90nm CMOS for energy detection IR-UWB receivers

Content Provider	IEEE Xplore Digital Library
Author	Qin Zhou Jia Mao Zhuo Zou Jonsson, F. Li-Rong Zheng
Copyright Year	2010
Description	Author affiliation: iPack Vinn Excellence Center, School of Information and Communication Technology, KTH-Royal Institute of Technology, Sweden (Qin Zhou; Jia Mao; Zhuo Zou; Jonsson, F.; Li-Rong Zheng)
Abstract	This paper presents a flexible timing circuit with 1.1ns delay resolution for energy detection IR-UWB receivers. Referenced at 900MHz input clock, the circuit generates multi-phased integration windows and reset signals that enable/disable the operation of analog blocks. The design is highly programmable, adapting the receiver to pulse level synchronization, symbol level synchronization, different data rates and various channel environments. Mixed-signal design flow is adopted to avoid the complexity of full custom design and the large power consumption of full synthesized digital design. The timing circuit is implemented in UMC 90nm CMOS process, with 219µW power consumption and $190*295µm^{2}$ die area.
Starting Page	413
Ending Page	416
File Size	1849936
Page Count	4
File Format	PDF
ISBN	9781424466825
e-ISBN	9781424466832
DOI	10.1109/SOCC.2010.5784668
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Receivers Synchronization Clocks Delay Signal resolution Power demand
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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