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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Rodriguez, D. Sanchez, J.M. Duran, A. |
| Copyright Year | 2005 |
| Description | Author affiliation: Dept. of Comput. Sci., Extremadura Univ., Caceres, Spain (Rodriguez, D.; Sanchez, J.M.; Duran, A.) |
| Abstract | This paper describes an hybrid architecture based on XML Web services for remote executing of hardware applications. The architecture is based on a service provider that hosts a reconfigurable logic coprocessor. Reconfigurable logic can be used for accelerating complex algorithms as diverse as digital signal processing, cryptography, pattern matching or compressing and decompressing tasks. The hardware applications implemented in the coprocessor and the administration functions of the device are exposed to remote applications as XML Web services methods. These services can be accessed from the same server or from remote clients over intranet/Internet using standard Web protocols like HTTP, XML and SOAP; these clients execute remote tasks in non-homogeneous distributed reconfigurable systems. The proposed architecture has been implemented using Microsoft .Net Framework to develop the XML Web services and the RC1000-PP platform plus Handel-C from Celoxica to support the reconfigurable computing applications. |
| Starting Page | 613 |
| Ending Page | 617 |
| File Size | 1062861 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780393333 |
| ISSN | 15206130 |
| DOI | 10.1109/SIPS.2005.1579939 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-11-02 |
| Publisher Place | Greece |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Distributed computing XML Web services Computer architecture Service oriented architecture Hardware Reconfigurable logic Coprocessors Acceleration Signal processing algorithms |
| Content Type | Text |
| Resource Type | Article |
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