NDLI: Design Procedure to Minimize Boost PFC Volume Concerning the Trade-offs Among Switching Frequency, Input Current Ripple and Soft-Switching

Content Provider	IEEE Xplore Digital Library
Author	Damasceno, D. Schuch, L. Pinheiro, J.R.
Copyright Year	2005
Description	Author affiliation: Power Electron. & Control Res. Group, Santa Maria Fed. Univ. (Damasceno, D.)
Abstract	The current harmonics injected in the mains by non-linear loads forced the use of pre-regulators to attend the IEC61000-3-2 standards and the CISPR22 recommendations. The increase of the switching frequency reduces the boost inductor volume, but requires a bulky EMI filter to operate according to the standards. Higher frequencies also intensify the switching losses in the semiconductor devices, increasing the heat sinks volume. In the same way, higher current ripple demands a lower boost inductor volume, but it also requires a bulky EMI filter and intensifies the conduction losses. However, the switching losses can be minimized using auxiliary commutation circuits, which reduce the power dissipation over the main semiconductor devices, decreasing the heatsinks volume. The goal of this paper is to present a design methodology to define the input current ripple and the switching frequency to minimize the filters and heat sinks volume using different methods to reduce the switching losses
Starting Page	2333
Ending Page	2338
File Size	718176
Page Count	6
File Format	PDF
ISBN	0780390334
DOI	10.1109/PESC.2005.1581958
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-06-16
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switching frequency Switching loss Heat sinks Inductors Electromagnetic interference Semiconductor devices Power harmonic filters Circuits Power dissipation Design methodology
Content Type	Text
Resource Type	Article

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