NDLI: Test chip for detecting thin film cracking induced by fast temperature cycling and electromigration in multilevel interconnect systems

Content Provider	IEEE Xplore Digital Library
Author	Nguyen, H.V. Salm, C. Vroemen, J. Voets, J. Krabbenborg, B. Bisschop, J. Mouthaan, A.J. Kuper, F.G.
Copyright Year	2002
Description	Author affiliation: Res. Inst., Univ. of Twente, Nijmegen, Netherlands (Nguyen, H.V.; Salm, C.)
Abstract	Temperature cycling in power ICs is a reliability hazard, even more so when electromigration is playing a role as well. The frequency of the temperature cycling is in the audio domain, which makes it impossible to test in environmental chambers. In the paper, the design and application of a novel test chip to study fast temperature cycling, electromigration and their interaction in multilevel interconnection systems is reported. Incorporated into the test chip are a heating element, a temperature sensor, and extrusion monitors. Simulation was used to study the initial stress distributions after processing and local temperature distributions in the test chip during the temperature transient. First experimental results have been obtained in the area of fast temperature cycling experiments (by using internal heating only) and electromigration experiments. Failure distributions and failure modes are discussed. Results indicate that on-chip cycling is a powerful tool to study reliability of power ICs under realistic conditions.
Starting Page	135
Ending Page	139
File Size	773147
Page Count	5
File Format	PDF
ISBN	0780374169
DOI	10.1109/IPFA.2002.1025632
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-07-12
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System testing Transistors Electromigration Temperature sensors Power integrated circuits Heating Temperature distribution Power system interconnection Power system reliability Hazards
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in