NDLI: A novel bitmap analysis technique - test sensitivity intensity bitmap

Content Provider	IEEE Xplore Digital Library
Author	Chan Huan Gim
Copyright Year	2002
Description	Author affiliation: Motorola Malaysia Sdn Bhd, Selangor, Malaysia (Chan Huan Gim)
Abstract	Bitmapping is a common tool used for analysis and device characterisation on volatile and non-volatile memory in integrated circuits. The tester normally provides the electrical failing address and the analyst will use a scramble table to convert the electrical failing address to the physical failing address. A software may be used to descramble the electrical failing addresses and then display the physical location of the failure using simple graphics. In this paper, a novel bitmap technique is presented. Instead of just displaying the X,Y physical location of the failure, which is basically two dimensions, this bitmap technique takes it a step further. The new bitmap technique 'test sensitivity intensity (TSI) bitmap' is a graphical combination of all the listed tools. The idea of using a graphical bitmap was to make it easier to visualise the failure and the pattern of the failure as test conditions change from relaxed conditions to very stringent conditions, compared to a simple data dump memory display.
Starting Page	105
Ending Page	109
File Size	898239
Page Count	5
File Format	PDF
ISBN	0780374169
DOI	10.1109/IPFA.2002.1025626
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-07-12
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Displays Topology Hardware Power supplies Failure analysis Electricity supply industry Nonvolatile memory Circuit testing Graphics Voltage
Content Type	Text
Resource Type	Article

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