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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Cascon, P. Ortega, J. Haider, W.M. Diaz, A.F. Rojas, I. |
| Copyright Year | 2009 |
| Abstract | In this paper, we propose a network interface that takes advantage of the parallelism available in network processors to improve the communication performance. Morespecifically, our proposal is based on the Intel IXP28xx network processor, as it includes sixteen processing cores with multithreading and an optimized design for packet processing. Thus, the proposed interface facilitates the exploitation of different options to optimize the communication path in the host by using network interface offloading and/or onloading strategies that try to take advantage of multi-core processors, which are available even in the network cards. The experimental results obtained for TCP/IP and raw Ethernet packets show that multithreading, implemented through the processing cores of the network processor, improves communication performance in both latency of the packets and bandwidth, thus allowing the applications that present high communication requirements to fulfill them through the use of multithreading. |
| Starting Page | 196 |
| Ending Page | 200 |
| File Size | 264055 |
| Page Count | 5 |
| File Format | |
| ISBN | 9780769535449 |
| ISSN | 10666192 |
| DOI | 10.1109/PDP.2009.58 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-02-18 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Network interfaces Multithreading Proposals Design optimization Process design Multicore processing TCPIP Ethernet networks Delay Bandwidth network interface network processors |
| Content Type | Text |
| Resource Type | Article |
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