NDLI: Integrated tests of a high speed VXS switch card and 250 MSPS flash ADCs

Content Provider	IEEE Xplore Digital Library
Author	Dong, H. Cuevas, C. Curry, D. Jastrzembski, E. Barbosa, F. Wilson, J. Taylor, M. Raydo, B.
Copyright Year	2007
Description	Author affiliation: Jefferson Lab, Newport (Dong, H.; Cuevas, C.)
Abstract	High trigger rate nuclear physics experiments proposed for the 12 GeV upgrade at the Thomas Jefferson National Accelerator Facility create a need for new high speed digital systems for energy summing. Signals from electronic detectors will be captured with the Jefferson Lab FADC module, which collects and processes data from 16 charged particle sensors with 10 or 12 bit resolution at 250 MHz sample rate. Up to sixteen FADC modules transfer energy information to a central energy summing module for each readout crate. The sums from the crates are combined to form a global energy sum that is used to trigger data readout for all modules. The Energy Sum module and FADC modules have been designed using the VITA-41 VME64 switched serial (VXS) standard. The VITA- 41 standard defines payload and switch slot module functions, and offers an elegant engineered solution for Multi-Gigabit serial transmission on a standard VITA-41 backplane. The Jefferson Lab Energy Sum module receives data serially at a rate of up to 6 Giga-bits per second from the FADC modules. Both FADC and Energy Sum modules have been designed and assembled and this paper describes the integrated tests using both high speed modules in unison.
Starting Page	831
Ending Page	833
File Size	1777549
Page Count	3
File Format	PDF
ISBN	9781424409228
ISSN	10957863
DOI	10.1109/NSSMIC.2007.4436457
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Testing Nuclear physics Particle accelerators Digital systems Signal processing Signal detection Nuclear electronics Detectors Energy resolution
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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