NDLI: Design a modulator and demodulator SSB by DSP processor TMS320C50 for PLC systems

Content Provider	IEEE Xplore Digital Library
Author	Rashidi, F. Rashidi, M. Hashemi-Hosseini, A.
Copyright Year	2003
Description	Author affiliation: Eng. Res. Inst., Tehran, Iran (Rashidi, F.)
Abstract	One of the most important parts of the data transmission systems is processing of the signals. In the primary models of this system, all these processes were done in an analog format. Because of this, the volume and the price were high. But in this model of system, however, all the processes are done digitally in which case the precision is high and also it contains all the abilities of the digitized systems. Some of the major changes in the structure of the system are: low cost, high precision, flexibility, etc. The main purpose of this paper is analyzing base band processes, HF modulator and SSB demodulator by the TMS320C50 processor. In this respect, the importance of the processor, its place and its operation is described and then a brief note is made on the TMS320 DSP processors made by Texas Instruments (TI) company and on the more important aspects of these processors. Following this is the analysis of the base band digital processor block diagram and the block diagrams of the digital process of the transmit (VF, HF) path. The block diagrams of the receive (VF, HF) digital process is then described and also the block diagram of the SSB demodulator by the TMS320C50 processor. Lastly there is the conclusion of this paper.
Sponsorship	IEEE Industrial Electronics Soc
Starting Page	1775
Ending Page	1779
File Size	284482
Page Count	5
File Format	PDF
ISBN	0780379063
DOI	10.1109/IECON.2003.1280328
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Demodulation Amplitude modulation Digital signal processing Programmable control Finite impulse response filter Data communication IIR filters Digital modulation Signal processing Costs
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Digital IF modulator and demodulator design for transmission over band-limited channels

Design and implement of BPSK modulator and demodulator based on modern DSP technology

A programmable demodulator for oversampled analog-to-digital modulators

Design & implementation of all digital I-Q modulator and demodulator for high speed WLAN in FPGA

Application of FIR digital filtering techniques based on programmable DSP-digital signal processor in a homing weapon

An equation error approach for the design of digital IIR compensation filters in IQ modulator

A 200-MHz all-digital QAM modulator and demodulator in 1.2- mu m CMOS for digital radio applications

Sequential design of IIR digital filters for low-power DSP applications

A fully digital feedforward demodulator for vector signal analyzers

Design a modulator and demodulator SSB by DSP processor TMS320C50 for PLC systems

Similar Documents

Digital IF modulator and demodulator design for transmission over band-limited channels

Design and implement of BPSK modulator and demodulator based on modern DSP technology

A programmable demodulator for oversampled analog-to-digital modulators

Design & implementation of all digital I-Q modulator and demodulator for high speed WLAN in FPGA

Application of FIR digital filtering techniques based on programmable DSP-digital signal processor in a homing weapon

An equation error approach for the design of digital IIR compensation filters in IQ modulator

A 200-MHz all-digital QAM modulator and demodulator in 1.2- mu m CMOS for digital radio applications

Sequential design of IIR digital filters for low-power DSP applications

A fully digital feedforward demodulator for vector signal analyzers

Design a modulator and demodulator SSB by DSP processor TMS320C50 for PLC systems