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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wenmiao Song Jingying Zhang Qiongqiong Yao |
| Copyright Year | 2009 |
| Description | Author affiliation: Dept. of Electronic & Communication Engineering, North China Electric Power University, Baoding, China (Wenmiao Song; Jingying Zhang; Qiongqiong Yao) |
| Abstract | This paper presents a method to design BPSK modulator and demodulator. The method makes use of modern DSP technology which uses the tool of DSP Builder of American Altera Co. The direct digital synthesis (DSP) principle is briefly presented and used to design orthogonal cosine signal module. In demodulator, we use the low pass FIR filtering IP core to filter high frequency component. The BPSK modem is ultimately implemented on the FPGA device. This design uses MATLAB/Simulink, DSP Builder 7.2, ModelSim 6.1g and Quartus II7.2 to simulate and realize directly BPSK modulator and demodulator based on FPGA, using DSP Builder to substitute the VHDL programming, has the organic integration in modeling and hardware implementation on the same work bench. The method can greatly improve the developing efficiency, shorten developing period and reduce costs. The practice has proved the accuracy and validity of the method. |
| Starting Page | 1135 |
| Ending Page | 1137 |
| File Size | 118872 |
| Page Count | 3 |
| File Format | |
| ISBN | 9781424440764 |
| DOI | 10.1109/MAPE.2009.5355961 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-10-27 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Design methodology Low pass filters IP core Binary phase shift keying FIR DSP Builde DDS Digital signal processing Finite impulse response filter BPSK Mathematical model Signal synthesis Field programmable gate arrays Signal design Demodulation |
| Content Type | Text |
| Resource Type | Article |
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