NDLI: Practical experiences in functional simulation. An integrated method from unit to co-simulation

Content Provider	IEEE Xplore Digital Library
Author	Schubert, K.-D.
Copyright Year	2002
Description	Author affiliation: IBM, Boblingen, Germany (Schubert, K.-D.)
Abstract	IBM, like other major companies, is developing large compute servers. These servers run typically various applications supported on a variety of different operating systems. To support all the user scenarios the systems consist of a hardware layer and a system software layer, that is hidden from the application or operating system. The hardware consists of a set of chips where some are unique for a given series of compute server. The system software, also called firmware, can be viewed as an extension of the hardware, to enable additional features and to manage those complex systems. From a verification point of view the task is to make sure that first of all the hardware chips are working according to the specification, that all these chips are also working together and nevertheless the firmware code is working seamlessly with the hardware. To complicate the task, the chip designs are following not always the same methodology, driven by the fact that we have a mix of custom designed VLSI chips, standard ASIC designs and some SoC type chips. With teams distributed globally the verification challenge is to integrate and coordinate all efforts to finally ensure that the overall system is working. The presentation will describe the problems and possible solutions, touching topics like standardization of interfaces, designs and languages, reusability of specifications, documentation and software, project managing aspects and their implications on the process.
Sponsorship	IEEE Comput. Soc. Tech. Council on Test Technol. IEEE Comput. Soc. Tech. Committee on Design Autom
File Size	119650
File Format	PDF
ISBN	0780376552
DOI	10.1109/HLDVT.2002.1224426
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-10-29
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Application software Operating systems System software Microprogramming Computational modeling Chip scale packaging Very large scale integration Application specific integrated circuits Standardization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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