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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Davoodi, A. Srivastava, A. |
| Copyright Year | 2005 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Maryland Univ., College Park, MD (Davoodi, A.; Srivastava, A.) |
| Abstract | In this paper we address the problem of growing leakage variability through effective dual-threshold voltage assignment. We propose a probabilistic dynamic programming-based method to assign dual-threshold voltages such that the overall expected leakage is minimized under a given probability of violating the timing constraint (timing yield). The key characteristics of our strategy are two pruning criteria that stochastically identify pareto-optimal solutions and prune the sub-optimal ones. Compared to other variability-driven dual-threshold voltage assignment schemes, the main advantages of our approach are 1) considering correlations due to common sources of variation, 2) providing controllable runtime, which in one of the proposed strategies is comparable to the deterministic algorithm, and 3) performing optimization based on all the signal paths simultaneously, as opposed to one path at a time. Experimental results indicate that the proposed probabilistic scheme is significantly better than a comparable deterministic dual-threshold voltage assignment, both in terms of expected leakage and the probability of violating the timing constraint |
| Sponsorship | ACM SIGDA IEEE Circuits and Syst. Soc |
| Starting Page | 143 |
| Ending Page | 148 |
| File Size | 1408011 |
| Page Count | 6 |
| File Format | |
| ISBN | 1595931376 |
| DOI | 10.1109/LPE.2005.195504 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-08-08 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Timing Threshold voltage Delay Algorithm design and analysis Permission Random variables Educational institutions Voltage control Logic design Design optimization |
| Content Type | Text |
| Resource Type | Article |
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