NDLI: Power and thermal effects of SRAM vs. latch-mux design styles and clock gating choices

Content Provider	IEEE Xplore Digital Library
Author	Yingmin Li Hempstead, M. Mauro, P. Brooks, D. Hu, Z. Skadron, K.
Copyright Year	2005
Description	Author affiliation: Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA (Yingmin Li)
Abstract	This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of power dissipation, and both design styles and various clock gating schemes can be found in modern, high-performance processors. Although some work in the circuits domain has explored these issues from a power perspective, thermal treatments are less common, and we are not aware of any work in the architecture domain. We study both SRAM and latch and multiplexer ("latch-mux") designs and their associated clock-gating options. Using circuit-level simulations of both design styles, we derive power-dissipation ratios which are then used in cycle-level power/performance/thermal simulations. We find that even though the "unconstrained" power of SRAM designs is always better than latch-mux designs, latch-mux designs dissipate less power in practice when a structure's average occupancy is low but access rate is high, especially when "stall gating" is used to minimize switching power. We also find that latch-mux designs with stall gating are especially promising from a thermal perspective, because they exhibit lower power density than SRAM designs. Overall, when combined with implementation and verification challenges for SRAMs, latch-mux designs with stall gating appear especially promising for designs with thermal constraints. This paper also shows the importance of considering the interaction between architectural and circuit design choices when performing early-stage design exploration.
Sponsorship	ACM SIGDA IEEE Circuits and Syst. Soc
Starting Page	173
Ending Page	178
File Size	1099878
Page Count	6
File Format	PDF
ISBN	1595931376
DOI	10.1109/LPE.2005.195509
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-08-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Random access memory Clocks Circuit simulation Signal design Permission Computer science Design engineering Power engineering and energy Energy efficiency Thermal engineering
Content Type	Text
Resource Type	Article

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