NDLI: Annealing process and structural considerations in controlling extrusion-type defects Cu TSV

Content Provider	IEEE Xplore Digital Library
Author	Jinho An Kwang-Jin Moon Soyoung Lee Do-Sun Lee Kiyoung Yun Byung-Lyul Park Ho-Jun Lee Jiwoong Sue Yeong-Lyeol Park Gilheyun Choi Ho-Kyu Kang Chilhee Chung
Copyright Year	2012
Description	Author affiliation: Semiconductor R & D Center, Samsung Electronics Co. Ltd., Hwasung-si, Gyeonggi-Do, 445-701 Korea (Jinho An; Kwang-Jin Moon; Soyoung Lee; Do-Sun Lee; Byung-Lyul Park; Ho-Jun Lee; Jiwoong Sue; Gilheyun Choi; Ho-Kyu Kang; Chilhee Chung) \|\| S.LSI Foundry Business Team/TD, Samsung Electronics Co. Ltd., Yongin-si, Gyeonggi-Do, 446-712 Korea (Kiyoung Yun; Yeong-Lyeol Park)
Abstract	Stresses induced by the large volume of Cu in Through Silicon Vias (TSV) can result in global/local Cu extrusion which may affect reliability in 3D chip stacking technologies beyond the 28 nm node for high performance mobile devices. In this work, TSV structural factors that can influence extrusion post via filling are studied. In addition, the impact of the electroplating chemistry and annealing schemes on local extrusion type defect formation in TSVs are also studied.
Starting Page	1
Ending Page	3
File Size	478375
Page Count	3
File Format	PDF
ISBN	9781467311380
e-ISBN	9781467311373
e-ISBN	9781467311366
DOI	10.1109/IITC.2012.6251586
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Through-silicon vias Annealing Stress Chemistry Grain size Microstructure Process control
Content Type	Text
Resource Type	Article

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Correlation between Cu microstructure and TSV Cu pumping

The influences of grain size distributions on thermal-stresses in Cu-TSV

Study of mechanical properties of Cu through-silicon-vias (TSV) specimen using electrodeposition bath

Microstructure investigation of TSV copper film

3D EBAD characterizations on copper TSV for 3D interconnections

Effect of microstructure on via extrusion profile and reliability implication for copper through-silicon vias (TSVs) structures

Experimentally, how does Cu TSV diameter influence its stress state?

Effect of electroplating parameter on the TSV-Cu protrusion during annealing and thermal cycling

Effect of thermal annealing on TSV Cu protrusion and local stress

Annealing process and structural considerations in controlling extrusion-type defects Cu TSV

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Correlation between Cu microstructure and TSV Cu pumping

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Study of mechanical properties of Cu through-silicon-vias (TSV) specimen using electrodeposition bath

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3D EBAD characterizations on copper TSV for 3D interconnections

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Experimentally, how does Cu TSV diameter influence its stress state?

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Annealing process and structural considerations in controlling extrusion-type defects Cu TSV