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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Vasan, B.K. Chen, D.J. Geiger, R.L. |
| Copyright Year | 2011 |
| Description | Author affiliation: Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa, USA (Vasan, B.K.; Chen, D.J.; Geiger, R.L.) |
| Abstract | Methods to test the Integral Non-Linearity (INL) of Analog-to-Digital Converters (ADCs) using any monotonic signal with low linearity are proposed. Two methods that estimate the INL of the ADC by removing the error due to non-linearity in the stimulus are described. Signals with linearity dramatically lesser than the ADC under test, can be used to accurately estimate the INL of the ADC. Simulation results show that the maximum INL estimation error for testing 14-bit ADCs using 36 dB pure sinusoids and 7-bit linear exponential signals is under 0.6 LSB. |
| Starting Page | 1 |
| Ending Page | 5 |
| File Size | 354175 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424479337 |
| ISSN | 10915281 |
| e-ISBN | 9781424479351 |
| DOI | 10.1109/IMTC.2011.5944342 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-05-10 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Linearity Signal generators Histograms Signal resolution Built-in self-test Estimation stimulus error removal (SER) Integral non-linearity (INL) differential non-linearity (DNL) stimulus error identification and removal (SEIR) |
| Content Type | Text |
| Resource Type | Article |
| Subject | Instrumentation Electrical and Electronic Engineering |
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