NDLI: A novel single-stage high-power-factor electronic ballast with symmetrical topology

Content Provider	IEEE Xplore Digital Library
Author	Cheng, H.L. Moo, C.S. Chen, W.M.
Copyright Year	2001
Description	Author affiliation: Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan (Cheng, H.L.)
Abstract	This paper proposes a novel single-stage high-power-factor high-efficiency electronic ballast with symmetrical topology for fluorescent lamps. The circuit topology is originated from the integration of two half-wave rectifiers with buck-boost power-factor-correction (PFC) converters and a half-bridge series-resonant parallel-loaded inverter. A high power factor at the input line is assured by operating the buck-boost converters in discontinuous conduction mode (DCM). With symmetrical operation and carefully designed circuit parameters, zero-voltage-switching (ZVS) on the active power switches of the inverter can be retained to achieve high circuit efficiency. The design equations are derived from the analyzed results based on fundamental approximation, and then an easy-to-use design tool is provided accordingly under considerations of filament heating and ignition. A prototype circuit designed for two T9-40W rapid-start fluorescent lamps is built and tested to verify the analytical predictions. Satisfactory performances are obtained from the experimental results.
Sponsorship	IEEE Ind. Electron. Soc.
Starting Page	30
Ending Page	35
File Size	507861
Page Count	6
File Format	PDF
ISBN	0780370902
DOI	10.1109/ISIE.2001.931750
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-06-12
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electronic ballasts Circuit topology Fluorescent lamps Inverters Circuit testing Rectifiers Reactive power Zero voltage switching Equations Heating
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in