NDLI: Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation

Content Provider	IEEE Xplore Digital Library
Author	Thomas, D.B. Luk, W.
Copyright Year	2008
Description	Author affiliation: Imperial Coll. London, London, UK (Thomas, D.B.; Luk, W.)
Abstract	The recent turmoil in global credit markets has demonstrated the need for advanced modeling of credit risk, which can take into account the effects of changing economic conditions on portfolios of loans. Such models are most easily described as Monte-Carlo simulations, but take too long to converge in software based simulators. This paper describes a hardware implementation of a loan portfolio simulator, which uses an event based model to describe changes both in prevailing economic conditions, and the behaviour of individual loans within the portfolio. Three distinct variants of the simulator are developed using transformations of the simulation algorithm, with each variant trading off area utilisation against the efficiency with which different event types can be processed. As the distribution of event types is highly dependent on the input data, each of the three variants provides the highest overall performance per FPGA for some set of input data characteristics. The hardware simulators are implemented using a Virtex-4 xc4vsx55 device running at 233 MHz in an RC2000 PCI card, and compared to four parallel software simulation threads running in a quad-core Pentium-4 Core2 at 2.4 GHz, providing a speed-up of between 60 and 100 times.
Starting Page	229
Ending Page	238
File Size	331835
Page Count	10
File Format	PDF
ISBN	9780769533070
DOI	10.1109/FCCM.2008.41
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-04-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Acceleration Bonding Portfolios Discrete event simulation Economic indicators Loans and mortgages Analytical models Environmental economics Stochastic processes Monte-Carlo FPGA Credit Risk Finance
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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