NDLI: Accelerating seismic migration using FPGA-based coprocessor platform

Content Provider	IEEE Xplore Digital Library
Author	He, C. Lu, M. Sun, C.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA (He, C.; Lu, M.; Sun, C.)
Abstract	Migration is the most important seismic data processing method that recovers subsurface images of the Earth's interior using surface-recorded data volumes obtained from seismic reflection surveys. A reconfigurable coprocessor platform called SPACE (seismic data processing accelerator with reconfigurable engine) using field programmable gate array (FPGA) technology is proposed in this paper to speed up these computationally demanding and data-intensive seismic migration applications. The proposed SPACE platform is characterized by its simple architecture and abundant on-board memory resources along with ultra-wide memory bandwidth, which also makes the platform suitable for other seismic data processing methods or some large-scale scientific computing applications. The time-consuming kernel part of the pre-stack Kirchhoff time migration (PSTM) algorithm is programmed into the FPGA-based coprocessor platform, which acts as a hardware accelerator attached to an Intel-based workstation through the local peripheral controller interface (PCI) bus. Improved performance can be achieved by integrating a number of parallel running fully pipelined arithmetic modules into a single FPGA chip. Our simulation results show that the proposed coprocessor platform operating at a conservative speed of 50 MHz can calculate the Kirchhoff summations for 50 million points per second, which is about 15.6 times faster than a referential 2.4 GHz Pentium 4 workstation. The impressive performance of the proposed platform implies its broad applications in seismic data processing industry.
Sponsorship	IEEE Comput. Soc. Tech. Comm. on Comput. Archit
Starting Page	207
Ending Page	216
File Size	230976
Page Count	10
File Format	PDF
ISBN	0769522300
DOI	10.1109/FCCM.2004.12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-04-20
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Acceleration Coprocessors Data processing Space technology Field programmable gate arrays Workstations Earth Reflection Engines Computer architecture
Content Type	Text
Resource Type	Article

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