NDLI: Virtual memory window for a portable reconfigurable cryptography coprocessor

Content Provider	IEEE Xplore Digital Library
Author	Vuletic, M. Pozzi, L. Ienne, P.
Copyright Year	2004
Description	Author affiliation: Processor Archit. Lab., Swiss Fed. Inst. of Technol. Lausanne, Switzerland (Vuletic, M.; Pozzi, L.; Ienne, P.)
Abstract	Reconfigurable system-on-chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today's commodities: the reconfigurable logic is often used to speed up execution of applications by implementing critical parts of the code as application-specific coprocessors. Cryptography applications are a good example of coprocessor applications: they are known to benefit significantly from spatial execution in hardware and have an increasing importance for mobile and ubiquitous computing. One of the main limits of FPGA-based coprocessors for these systems is the fact that both the coprocessor hardware description and the software program invoking are inevitably ridden with system details of the specific interface FPGA/processor: this limits significantly design reuse, impacts time-to-market, and makes development more complex. In this paper, we present a portable reconfigurable cryptography coprocessor designed for a virtual memory window (VMW) system. A VMW is a generic virtualisation layer composed of a hardware and an operating system component; it lowers the complexity of interfacing, increases portability, and makes it possible for the coprocessor to access the user-space virtual memory. The approach is illustrated here with the IDEA cryptography application running under Linux on a reconfigurable SoC, having its critical function mapped on the FPGA. A significant fraction of the speed-up inherent to hardware execution in the FPGA is preserved, while the hardware and software designs of the cryptography application become perfectly portable.
Sponsorship	IEEE Comput. Soc. Tech. Comm. on Comput. Archit
Starting Page	24
Ending Page	33
File Size	184457
Page Count	10
File Format	PDF
ISBN	0769522300
DOI	10.1109/FCCM.2004.62
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-04-20
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Cryptography Coprocessors Hardware Field programmable gate arrays Application software System-on-a-chip Reconfigurable logic Mobile computing Ubiquitous computing Time to market
Content Type	Text
Resource Type	Article

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