NDLI: Improving the performance of hierarchical scheduling for rendering

Content Provider	IEEE Xplore Digital Library
Author	Khan, Ab Rouf Saleem, Mir Banday, Shoaib Amin
Copyright Year	2014
Description	Author affiliation: Department of Electronics and Communication Engineering, NIT Srinagar, J&K India-190006 (Banday, Shoaib Amin) \|\| Department of computer sciences, Amar Singh College, Srinagar (Saleem, Mir) \|\| School of Computing Sciences and Engineering. VIT University, Vellore - 632014 Tamil Nadu (Khan, Ab Rouf)
Abstract	With the improvement and development of the high performance computing systems, the need arises to use the resources available at hand efficiently. Rendering is one kind of application which is suitable for high computing. In the modern era of computing we have got the quad processors available, but the processes and data we manipulate on these, is still based on the serial algorithms in many of the cases. As rendering needs more computing and is associated with huge data access, it can be broken into the smaller subtasks of same nature to be executed on the different processors. The parallel approach works on the principle of solving or computing the different similar sub-tasks using the different available resources of computing (processors) in a parallel fashion. Means at the end of one unit of time, we are having the result of as much number of subtasks in hand, as the number of processors available. The only thing we need to keep in mind is how to efficiently share the resources between different subtasks and how to balance the load factor as per different processors are considered. In this paper we are proposing a hierarchical scheduling policy for rendering to improve its performance as compared to the present day available methods. We will evaluate the approach with the existing approaches for rendering to show the improvement in performance.
Starting Page	457
Ending Page	460
File Size	208301
Page Count	4
File Format	PDF
e-ISBN	9781479958719
DOI	10.1109/CIPECH.2014.7019061
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-11-28
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Beauty Program processors Rendering Rendering (computer graphics) Load management Parallel Processing Workstations Elegance Time complexity Parallel algorithms Simplicity
Content Type	Text
Resource Type	Article

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